The present invention relates to systems and methods for testing multiple radio frequency (RF) signal transceivers concurrently, and in particular, to confirming RF signal connection integrity when testing such devices.
Many of today's electronic devices use wireless technologies for both connectivity and communications purposes. Because wireless devices transmit and receive electromagnetic energy, and because two or more wireless devices have the potential of interfering with the operations of one another by virtue of their signal frequencies and power spectral densities, these devices and their wireless technologies must adhere to various wireless technology standard specifications.
When designing such devices, engineers take extraordinary care to ensure that such devices will meet or exceed each of their included wireless technology prescribed standard-based specifications. Furthermore, when these devices are later being manufactured in quantity, they are tested to ensure that manufacturing defects will not cause improper operation, including their adherence to the included wireless technology standard-based specifications.
For testing these devices following their manufacture and assembly, current wireless device test systems employ a subsystem for analyzing signals received from each device. Such subsystems typically include at least a vector signal analyzer (VSA) for analyzing signals produced by the device, and a vector signal generator (VSG) for generating signals to be received by the device. The analyses performed by the VSA and the signals generated by the VSG are generally programmable so as to allow each to be used for testing a variety of devices for adherence to a variety of wireless technology standards with differing frequency ranges, bandwidths and signal modulation characteristics.
As part of the manufacturing of wireless communication devices, one significant component of product cost is manufacturing test cost. Typically, there is a direct correlation between the cost of test and the time required to perform such test. Thus, innovations that can shorten test time without compromising test accuracy or increasing capital equipment costs (e.g., increasing costs due to increasing sophistication of test equipment, or testers) are important and can provide significant cost savings, particularly in view of the large numbers of such devices being manufactured and tested.
However, all systems and methods for testing such devices have one thing in common: RF signal connection integrity. Although the devices being tested, as discussed in more detail below, are wireless RF signal transceivers, testing is nonetheless conducted using cabled signal paths to ensure reliable and substantially lossless signal connections. Accordingly, if any of these conductive signal connections between a DUT and the test equipment used for performing the tests is shorted, open or experiences a significantly different signal impedance, any test results obtained will be suspect at best, and more generally of no value. Hence, it would be desirable for having test systems and methods for confirming RF signal connection integrity between the test equipment and each DUT being tested so as to ensure there are no shorted, open or mismatched impedance connections that can cause erroneous test results to be generated. Such connection confirmation would further enable monitoring and scheduling of events (e.g., powering up a DUT that has been confirmed as connected and thereby minimizing down time in a production test environment), as well as enable tracking of events (e.g., to compile a DUT connection history and thereby anticipate potential needs for repairs or maintenance within the testing environment).
Referring to FIG. 1, for example, a flow graph for a typical two-port RF signal network can be depicted as shown. Each port includes two nodes, one for the incident, or entering, wave and the other for the reflected, or leaving, wave to be conveyed via that signal port. (For purposes of this discussion, the incident and reflected nodes are identified by “a” and “b”, respectively.) In this example, when the incident wave enters the device at Port 1, part of it will be returned through the s11 path and b1 node, while the remaining portion of the incident wave continues through the s21 path and leaves the network via the b2 node. If a device or load connected to Port 2 has signal reflections, e.g., due to mismatched impedances, it will reflect part of the wave leaving the b2 node, with such reflected wave portion re-entering the network via the a2 node. In turn, a portion of this may be reflected, passing via the s22 path and leaving the network via the b2 node. The remaining portion of the reflected wave continues on through the s12 path and leaves the network via the b1 node. Accordingly, an incident wave entering a network, e.g., via the a1 node, can result in a reflected signal returning via the b1 node. In accordance with well-known principles, this reflected signal component b1 can be expressed in terms of the initial incident signal a1, reflected signal a2, and the network scattering perimeters associated with the s11 path and s12 path as follows: b1=a1*s11+a2*s12. In the event that Port 2 experiences no signal reflections, e.g., by being attached to a matching impedance, there is no reflected signal entering at the a2 node, and this expression simplifies to b1=a1*s11. Hence, the ideal scenario occurs when impedances match, thereby minimizing the sii component.